1. Field of the Invention
The present invention relates to a method for operating a memory module, and more specifically, to a method for operating a NAND-array memory module composed of P-type memory cells.
2. Description of the Prior Art
Flash memory can be divided into P-channel flash memory and N-channel flash memory according to the type of its composing memory cells. Memory cells of an N-channel flash memory are formed on a P-type substrate, with two N-type doped regions respectively used as a source and a drain of each memory cell. Memory cells of a P-channel flash memory are formed on an N-type well, with two P-type doped regions respectively used as a source and a drain of each memory cell. Generally speaking, memory cells of an N-channel flash memory have a faster operational speed than memory cells of a P-channel flash memory. However, memory cells of an N-channel flash memory require higher voltage and power, while memory cells of a P-channel flash memory operated with lower voltage and power.
According to the structure, flash memory can be divided into NOR flash memory and NAND flash memory. The drains of memory cells of a NOR flash memory are connected in parallel for a faster reading speed, which is suitable for a code flash memory mainly used for executing program code. The drains and sources of two neighboring memory cells of a NAND flash memory are serially connected for integrating more memory cells per unit area, which is suitable for a data flash memory mainly used for data storage. NAND flash memory and NOR flash memory have different operating methods. Typcially, a NAND flash memory composed of N-channel memory cells utilizes Fowler-Nordheim (FN) tunneling during writing operations, while a NOR flash memory composed of N-channel memory cells utilizes channel hot electron injection during writing operations.
In 1992, in their paper “A High Speed, Low Power P-Channel Flash EEPROM Using Silicon Rich Oxide as Tunneling Dielectric” in International Conference on Solid State Devices and Materials (SSDM), p. 140-p. 142, Hsu et al. disclosed that the hot electron injection current in a P-channel memory can be larger by two orders of magnitude than that in an N-channel memory, and the channel current in a P-channel memory can be less by two orders of magnitude than that in an N-channel memory.
In 1995, T. Ohnakado et al. of Mitsubushi Co. disclosed a technology using a gate induced drain leakage (GIDL) current accelerated by a lateral electric field to generate a hot electron, which has been applied in the writing operation of a P-channel flash memory, in their paper “Novel Electron Injection Method Using Band-to-Band Tunneling Induced Hot Electron (BBHE) for Flash Memory with a P-Channel Cell”.
As mentioned above, although N-channel flash memory has a faster operating speed than P-channel flash memory, P-channel flash memory can operate under lower voltage and power, which is more suitable for portable electronic products requiring lower power consumption rather than N-channel flash memory. As technology progresses, the operational methods of P-channel flash memory are continuously being renewed. However in practical applications, both NAND flash memory composed of P-channel memory cells and NOR flash memory composed of P-channel memory cells require better operating methods for better performance.